00431nam a2200121Ia 4500008004100000082001200041100004900053245009200102563000900194652000900203700007700212852002000289141108s9999 xx 000 0 und d a621.395 a"DHARMESH N SHAH , LAVANYA J AND MATHANGI C" aSIMULATION OF HIGH LEVEL DATA LINK CONTROL (HDLC) PROTOCOL CONTROLLER USING VERILOG HDL aSOFT aVHDL f20045HCL PERIPHERALSaMrs.V.S.KANCHANA BASKARANgMr.P.MURUGESANbECE 94 aCENTRAL LIBRARY