00413nam a2200121Ia 4500008004100000082001200041100006200053245009400115563001200209652000900221700004100230852002000271141108s9999    xx            000 0 und d  a621.395  a"ANTO DOLPHIN JOSE J M, INDER KUMERASON AND LOGANATHAN R"  aSIMULATION OF ASYNCHRONOUS DATAPATH AND IMPLEMENTATION OF HDLC PROTOCOL USING VERILOG HDL  aWRAPPER  aVLSI  f20055SELFaKANCHANA BHAASKARAN  V S  aCENTRAL LIBRARY