000 00523nam a2200193Ia 4500
008 141108s9999 xx 000 0 und d
020 _aNULL
082 _aNULL
100 _aANAND K S & RAJIV J
245 _aLOW POWER HIGH PERFORMANCE ARCHITECTURE FOR SINGULAR VALUE DECOMPOSITION OF RANDOMLY SPARSE MATRICES
520 _aNULL
563 _aHARD
590 _aUG
650 _aNULL
652 _aPOWER SYSTEMS
700 _fNULL
_5NULL
_aDR.V.K.PANDEY
_gNULL
_bCSE 67
852 _aCENTRAL LIBRARY
942 _cPR
999 _c62439
_d62439