000 00536nam a2200193Ia 4500
008 141108s9999 xx 000 0 und d
020 _aNULL
082 _aNULL
100 _a"BALAMURUGAN , FRANKLIN DAVID & SATHISH KUMAR"
245 _aDESIGN AND SIMULATION OF STATIC RANDOM ACCESS MEMORY USING VHDL AND SPICE
520 _aNULL
563 _aWRAPPER
590 _aUG
650 _aNULL
652 _aVHDL
700 _fNULL
_5R.R.SYSTEMS
_aD.K.NARAYANAN
_gMr.SAJEETH BABU
_bEEE 29
852 _aCENTRAL LIBRARY
942 _cPR
999 _c62516
_d62516