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EVOLVING A LOW POWER FAULT TOLERANT TECHNIQUE FOR HIGH PERFORMANCE COMPUTER ARCHITECTURES (Record no. 62299)

MARC details
000 -LEADER
fixed length control field	00492nam a2200157Ia 4500
082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number	4.22
100 ## - MAIN ENTRY--AUTHOR NAME
Personal name	PRADEEP S AND SUBRAMANIAN S
245 ## - TITLE STATEMENT
Title	EVOLVING A LOW POWER FAULT TOLERANT TECHNIQUE FOR HIGH PERFORMANCE COMPUTER ARCHITECTURES
652 ## - SUBJECT ADDED ENTRY--REVERSE GEOGRAPHIC (BK MP SE) [OBSOLETE]
Geographic name of place element	COMPUTER ARCHITECTURE
852 ## - LOCATION/CALL NUMBER
Location	CENTRAL LIBRARY
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type	Project Report

Holdings
Home library	Current library	Date acquired	Full call number	Accession Number	Koha item type	Department
Central Library - SSNCE	Central Library - SSNCE	08/11/2014	4.22	PR280	Project Report	ECE