LOW POWER HIGH PERFORMANCE ARCHITECTURE FOR SINGULAR VALUE DECOMPOSITION OF RANDOMLY SPARSE MATRICES (Record no. 62439)

MARC details
000 -LEADER
fixed length control field 00523nam a2200193Ia 4500
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
ISBN NULL
082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number NULL
100 ## - MAIN ENTRY--AUTHOR NAME
Personal name ANAND K S & RAJIV J
245 ## - TITLE STATEMENT
Title LOW POWER HIGH PERFORMANCE ARCHITECTURE FOR SINGULAR VALUE DECOMPOSITION OF RANDOMLY SPARSE MATRICES
520 ## - SUMMARY, ETC.
Summary, etc NULL
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical Term NULL
652 ## - SUBJECT ADDED ENTRY--REVERSE GEOGRAPHIC (BK MP SE) [OBSOLETE]
Geographic name of place element POWER SYSTEMS
852 ## - LOCATION/CALL NUMBER
Location CENTRAL LIBRARY
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type Project Report
Holdings
Home library Current library Date acquired Full call number Accession Number Koha item type Department
Central Library - SSNCE Central Library - SSNCE 08/11/2014 NULL PR210 Project Report CSE
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Last Update: 01.07.2026