TOP DOWN VLSI DESIGN: FROM ARCHITECTURES TO GATE LEVEL CIRCUITS AND FPGAS (Record no. 70932)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 00508nam a2200217Ia 4500 |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9780128007303 |
| 041 ## - LANGUAGE CODE | |
| Language code of text/sound track or separate title | English |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.395 KAE |
| 100 ## - MAIN ENTRY--AUTHOR NAME | |
| Personal name | KAESLIN |
| 245 ## - TITLE STATEMENT | |
| Title | TOP DOWN VLSI DESIGN: FROM ARCHITECTURES TO GATE LEVEL CIRCUITS AND FPGAS |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
| Name of publisher | MORGAN KAUFMANN |
| Year of publication | 2015 |
| 300 ## - PHYSICAL DESCRIPTION | |
| Number of Pages | 578 |
| 365 ## - TRADE PRICE | |
| Price amount | 9477 |
| Unit of pricing | Rupees |
| 366 ## - TRADE AVAILABILITY INFORMATION | |
| Note | PURCHASE |
| 541 ## - IMMEDIATE SOURCE OF ACQUISITION NOTE | |
| Source of acquisition | TBH |
| Method of acquisition | Supplier |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Source of heading or term | VLSI |
| 852 ## - LOCATION/CALL NUMBER | |
| Location | CENTRAL LIBRARY |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | Books |
| Home library | Current library | Date acquired | Cost, normal purchase price | Full call number | Accession Number | Invoice Number | Koha item type | Department |
|---|---|---|---|---|---|---|---|---|
| Central Library - SSNCE | Central Library - SSNCE | 12/01/2016 | 9477.00 | 621.395 KAE | 66763 | 1404 | Books | ECE |